Silicon Labs /EFR32FG23B010F128GM40 /RFECA1_S /CONTROL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CONTROL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SINGLE)BUFMODE 0 (ACCEPT)QCHANNELMODE

BUFMODE=SINGLE, QCHANNELMODE=ACCEPT

Description

No Description

Fields

BUFMODE

Buffer Mode

0 (SINGLE): Single buffer is used

1 (DUAL): Dual buffers are used

QCHANNELMODE

Q-Channel Mode

0 (ACCEPT): ECA immediately stops current operation and asserts QACCEPTn after completing the last outstanding DMA bus transaction

1 (DENY): ECA responds to any QREQn request with a QDENY response if ECA is active currenly

Links

()